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Cellular Processor Arrays for Topographic Calculations

Architecture, Programming, Efficiency, and Implementability

Erschienen am 29.12.2016, 1. Auflage 2016
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Bibliografische Daten
ISBN/EAN: 9783330015029
Sprache: Englisch
Umfang: 172 S.
Format (T/L/B): 1.1 x 22 x 15 cm
Einband: kartoniertes Buch

Beschreibung

High performance, general purpose processor chips apply multiple (a few dozens) processor cores nowadays due to technological reasons and power constraints. On the other hand, Cellular Processor Arrays, specially optimized for topographic processing problems, uses tens of thousand locally interconnected processing elements. Vision chips, based on this topology, reach extremely high computational performance and above 10,000 FPS speed within the sub Watt power budget for small images, or few hundreds FPS for HD images. This book discusses the organization, the architectural, the programming, the communication, the efficiency, the applicability, the implementability and the performance questions of these processor arrays.

Autorenportrait

Akos Zarandy, MSc in Electrical Engineering, BME Budapest 1992. PhD and DSc in Computer Science at the Hungarian Academy of Sciences 1997 and 2010 resp. Industry: AnaLogic Inc. CEO; 2000-2004, Eutecus Inc, Berkeley CA, CTO, 2004-2005. Academy: Institute for Computer Science and Control, Budapest, University: Pazmany Peter Catholic University.

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